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CDB4382 Evaluation Board for CS4382
Features
l Demonstrates
Description
The CDB4382 evaluation board is an excellent means for quickly evaluating the CS4382 24-bit, eight channel D/A converter. Evaluation requires an analog signal analyzer, a digital signal source, a PC for controlling the CS4382 (for control port mode only) and a power supply. Analog line level outputs are provided via RCA phono jacks. The CS8414 digital audio receiver I.C. provides the system timing necessary to operate the Digital-to-Analog converter and will accept AES/EBU, S/PDIF, and EIAJ340 compatible audio data. The evaluation board may also be configured to accept external timing and data signals for operation in a user application during system development. ORDERING INFORMATION CDB4382 Evaluation Board
recommended layout and grounding arrangements l CS8414 receives AES/EBU, S/PDIF, & EIAJ340 compatible digital audio l Requires only a digital signal source and power supplies for a complete Digital-toAnalog-Converter system
Control Port Inputs for Clocks and Data
CS8414 Digital Audio Interface CS4382
Analog Outputs
Inputs for DSD Data and Clock
MUTE
Preliminary Product Information
P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http://www.cirrus.com
This document contains information for a new product. Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2001 (All Rights Reserved)
MAY `01 DS514DB1 1
CDB4382
TABLE OF CONTENTS
1. 2. 3. 4. 5. 6. 7. 8. CS4382 DIGITAL TO ANALOG CONVERTER ........................................................................ 3 CS8414 DIGITAL AUDIO RECEIVER ...................................................................................... 3 INPUT/OUTPUT FOR CLOCKS AND DATA ........................................................................... 3 POWER SUPPLY CIRCUITRY ................................................................................................. 3 GROUNDING AND POWER SUPPLY DECOUPLING ............................................................ 3 CONTROL PORT SOFTWARE ................................................................................................ 3 DSD OPERATION .................................................................................................................... 4 ANALOG OUTPUT FILTER ..................................................................................................... 4
LIST OF FIGURES
Figure 1. System Block Diagram and Signal Flow .......................................................................... 7 Figure 2. CS4382 ............................................................................................................................ 8 Figure 3. CS8414 Digital Audio Receiver........................................................................................ 9 Figure 4. PCM Input Header ......................................................................................................... 10 Figure 5. DSD Input Header.......................................................................................................... 11 Figure 6. Control Port .................................................................................................................... 12 Figure 7. Channel 1 Outputs and Mute ......................................................................................... 13 Figure 8. Channel 2 Outputs and Mute ......................................................................................... 14 Figure 9. Channel 3 Outputs and Mute ......................................................................................... 15 Figure 10. Channel 4 Outputs and Mute ....................................................................................... 16 Figure 11. Power Supply ............................................................................................................... 17 Figure 12. Silkscreen Top ............................................................................................................. 18 Figure 13. Top Side....................................................................................................................... 19 Figure 14. Bottom Side.................................................................................................................. 20
LIST OF TABLES
Table 1. System Connections ......................................................................................................... 5 Table 2. CDB4382 Jumper Settings................................................................................................ 6
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at: http://www.cirrus.com/corporate/contacts
I2C is a registered trademark of Philips Semiconductors. SPI is a registered trademark of International Business Machines Corporation. Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product information describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind (express or implied). No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, nor for infringements of patents or other rights of third parties. This document is the property of Cirrus Logic, Inc. and implies no license under patents, copyrights, trademarks, or trade secrets. No part of this publication may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc. Items from any Cirrus Logic website or disk may be printed for use by the user. However, no part of the printout or electronic files may be copied, reproduced, stored in a retrieval system, or transmitted, in any form or by any means (electronic, mechanical, photographic, or otherwise) without the prior written consent of Cirrus Logic, Inc.Furthermore, no part of this publication may be used as a basis for manufacture or sale of any items without the prior written consent of Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at http://www.cirrus.com.
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CDB4382
CDB4382 SYSTEM OVERVIEW
The CDB4382 evaluation board is an excellent means of quickly evaluating the CS4382. The CS8414 digital audio interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test equipment. The evaluation board also allows the user to supply either PCM or DSD clocks and data through 18-pin headers for system development. The CDB4382 schematic has been partitioned into 10 schematics shown in Figures 2 through 11. Each partitioned schematic is represented in the system diagram shown in Figure 1. Notice that the system diagram also includes the interconnections between the partitioned schematics. and data. The schematic for the clock/data input is shown in Figure 4. Header J16 allows the evaluation board to accept externally generated DSD data and clock. The schematic for the clock/data input is shown in Figure 5. A synchronous MCLK must still be provided via header J15. Please see the CS4382 datasheet for more information.
4. POWER SUPPLY CIRCUITRY
Power is supplied to the evaluation board by six binding posts (GND, +5V, VLS, VLC, +12V and 12V), see Figure 11. The +5V input supplies power to the +5 volt digital circuitry (+5V, VD_+5, VA_+5), while the VLS and VLC inputs supply power to the Voltage Level Converters and the CS4382 VLS and VLC pins respectively. +12V and -12V supply power to the op-amps and can be +/-5 to +/-12 volts. WARNING: Refer to the CS4382 datasheet for maximum allowable voltages levels. Operation outside of this range can cause permanent damage to the device.
1. CS4382 DIGITAL TO ANALOG CONVERTER
A description of the CS4382 is included in the CS4382 datasheet.
2. CS8414 DIGITAL AUDIO RECEIVER
The system receives and decodes the standard S/PDIF data format using a CS8414 Digital Audio Receiver, Figure 3. The outputs of the CS8414 include a serial bit clock, serial data, left-right clock (FSYNC), and a 256 Fs master clock. The CS8414 data format has been configured for I2S. The operation of the CS8414 and a discussion of the digital audio interface are included in the CS8414 datasheet. The evaluation board has been designed such that the input can be either optical or coax, see Figure 3. However, both inputs cannot be driven simultaneously.
5. GROUNDING AND POWER SUPPLY DECOUPLING
The CS4382 requires careful attention to power supply and grounding arrangements to optimize performance. Figure 2 details the power distribution used on this board. The decoupling capacitors are located as close to the CS4382 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated noise.
6. CONTROL PORT SOFTWARE
The CDB4382 is shipped with Windows based software for interfacing with the CS4382 control port via the DB25 connector, J1. The software can be used to communicate with the CS4382 in either SPI or Two Wire mode; however, in SPI mode the CS4382 registers are write-only.
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3. INPUT/OUTPUT FOR CLOCKS AND DATA
The evaluation board has been designed to allow interfacing to external systems via the 18-pin headers, J15 and J16. Header J15 allows the evaluation board to accept externally generated PCM clocks
CDB4382
Note: The Two Wire control port mode is compatible with the I2C protocol.
7. DSD OPERATION
The CDB4382 supports Direct Stream Digital (DSD) operation through the header for external clocks and data, J16. The CS4382 must be placed into the DSD mode and headers J6 and J14 must be set accordingly. See Table 2 for more information.
8. ANALOG OUTPUT FILTER
The application note "Design Notes for a 2-Pole Filter with Differential Input" discusses the second-order Butterworth filter and differential to single-ended converter which was implemented on the CS4382 evaluation board, CDB4382. The filter, as seen in Figures 7 through 10, is a linear phase design and does not include phase or amplitude compensation for an external filter. Therefore, the DAC system phase and amplitude response will be dependent on the external analog circuitry.
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CDB4382
CONNECTOR +5V VLS VLC -12V +12V GND Coax Input Optical Input J15 J16 Parallel Port J17 OUT1A OUT1B OUT2A OUT2B OUT3A OUT3B OUT4A OUT4B
INPUT/OUTPUT Input Input Input Input Input Input Input Input Input Input Input/Output Input/Output Output Output Output Output Output Output Output Output + 5 Volt power
SIGNAL PRESENT + 1.8 to +5V power for the CS4382 serial interface + 1.8 to +5V power for the CS4382 control interface -12 to -5V negative supply for the op-amps +5 to +12V positive supply for the op-amps Ground connection from power supply Digital audio interface input via coax Digital audio interface input via optical Input for master, serial, left/right clocks and serial data Input for DSD data and clock Parallel connection to PC for SPI / Two Wire control port signals I/O for SPI / Two Wire control port signals Channel 1A line level analog output Channel 1B line level analog output Channel 2A line level analog output Channel 2B line level analog output Channel 3A line level analog output Channel 3B line level analog output Channel 4A line level analog output Channel 4B line level analog output
Table 1. System Connections
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CDB4382
JUMPER / SWITCH J4 J6 J9 J10 J11 J12 J14 J21-J28
PURPOSE Stand-Alone/Control Port Select Clock Source Select M0/AD0/CS M1/SDA/CDIN M2/SCL/CCLK M3/DSD_CLK Input Mode Select Mute Enables
POSITION SA *CP *CS8414 External *HI LO *HI LO *HI LO HI *LO *PCM DSD
FUNCTION SELECTED Stand-Alone Mode (No PC required) Control Port Mode (PC required) CS8414 provides PCM inputs to CS4382 PCM or DSD inputs are provided externally See CS4382 datasheet for details See CS4382 datasheet for details See CS4382 datasheet for details See CS4382 datasheet for details Selects PCM input mode Selects DSD input mode (via J16) Enables the external mute circuit for each channel when jumpered
Table 2. CDB4382 Jumper Settings *Default Factory Settings
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Control Port Figure 6 Reset Circuit
Channel 1 Outputs and Mute Figure 7 Channel 2 Outputs and Mute Figure 8 Channel 3 Outputs and Mute Figure 9 Channel 4 Outputs and Mute Figure 10
DSD1A DSD1B DSD2A DSD2B DSD3A DSD3B DSD4A DSD4B DSD_CLK
8414 Digital Audio Receiver Figure 3 CS4382 Figure 2
MCLK SCLK1 LRCK1 SDATA1 SDATA2 SDATA3 SDATA4
PCM Inputs
SCLK2 LRCK2
Figure 4
DSD Inputs Figure 5
CDB4382
Figure 1. System Block Diagram and Signal Flow
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A2 B1 A1 B2 A3 B3 A4 B4 ( A1 A1 B1 B1 A2 A2 B2 B2 ) (DSD_EN) B4 B4 A3 A3 B3 B3 A4 A4
CDB4382
Figure 2. CS4382
CDB4382
Figure 3. CS8414 Digital Audio Receiver
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CDB4382
Figure 4. PCM Input Header
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CDB4382
Figure 5. DSD Input Header
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CDB4382
Figure 6. Control Port
CDB4382
Figure 7. Channel 1 Outputs and Mute
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CDB4382
Figure 8. Channel 2 Outputs and Mute
CDB4382
Figure 9. Channel 3 Outputs and Mute
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CDB4382
Figure 10. Channel 4 Outputs and Mute
CDB4382
Figure 11. Power Supply
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CDB4382
Figure 12. Silkscreen Top
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CDB4382
Figure 13. Top Side
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CDB4382
Figure 14. Bottom Side
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* Notes *

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